The triple-logic package

Affordable and accessible selective hardening

What is the triple-logic package?

The triple-logic package is a VHDL package for easy and vendor-independent selective hardening of VHDL designs.

It is a perfect complement for the FTUNSHADES hardware-accelerated fault injection platform: with FTU you can find the most sensitive elements of your design, and afterwards optimally harden your design by inserting redundancy only in those sensitive elements using the triple-logic package.

How does it work?

Hardened datatypes

By changing an object (signal, port, or variable) datatype from:

std_logic, std_logic_vector, integer, unsigned or signed

to:

triple_logic, triple_logic_vector, triple_integer, triple_signed or triple_unsigned

The circuit element in question (port, signal, variable) will be tripled.

Hardening inside your sources, not from an external tool

This way you can generate a selectively hardened version of your code, including the protections inside it.

This approach works with any synthesizer or simulator, although special care must be taken with the synthesizer flags and attributes to avoid the optimization of the protections. These flags and attributes are typically different for each synthesis tool.

More information

For a more complete explanation of how the package works, you can read our paper describing the approach

Can I use it?

Sure! You can find the package source on github.

The package is licensed under a permissive license (GNU LGPL), although we can offer alternate licensing options.

Acknowledgement

This work was supported by the Spanish Ministerio de Economía y Competitividad, through the project “Diseño de sistemas digitales robustos frente a radiación mediante componentes y tecnologías comerciales” (RENASER3), project reference ESP2015-68245-C4-2-P. This work was also supported by the European Commission, through the project “VEGAS: Validation of European high capacity rad-hard FPGA and software tools”, project ID 687220.

Contact

Hipólito Guzmán-Miranda
hguzman@us.es
Address
Escuela Superior de Ingenieros, Departamento de Ingeniería Electrónica. Camino de los descubrimientos s/n 41092 Sevilla (SPAIN)